The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. However, such scaling down has also been accompanied by increased complexity in design and manufacturing of devices incorporating these ICs, and, for these advances to be realized, similar developments in device fabrication are needed.
In one exemplary aspect, photolithography is a process used in semiconductor micro-fabrication to selectively remove parts of a thin film or a substrate. The process uses light to transfer a pattern (e.g., a geometric pattern) from a photomask to a light-sensitive layer (e.g., a photoresist layer) on the substrate. The light causes a chemical change (e.g., increasing or decreasing solubility) in exposed regions of the light-sensitive layer. Baking processes may be performed before and/or after exposing the substrate, such as in a pre-exposure and/or a post-exposure baking process. A developing process then selectively removes the exposed or unexposed regions with a developer solution forming an exposure pattern in the substrate. Finally, a process is implemented to remove (or strip) the remaining photoresist from the underlying material layer(s), which may be subjected to addition circuit fabrication steps. For a complex IC device, a substrate may undergo multiple photolithographic patterning processes.
Structures and compositions of photoresist materials have been modified in order to accommodate complex patterning processes for devices with decreased sizes. Though such modifications have been generally beneficial, they have not been entirely satisfactory. For these reasons and others, additional improvements are desirable.